Folded-patch chip-size antennas for wireless microsystems

• Autor(es): Mendes, P. M. ; Polyakov, A. ; Bartek, M. ; Burghartz, J. N. ; Correia, J. H.
• Data: 2003
• Identificador Persistente: http://hdl.handle.net/1822/1562
• Origem: RepositóriUM - Universidade do Minho
• Assunto(s): Folded patch antenna; Chip size antenna; Antenna integration
• Tipo de Documento: Documento de conferência
• Idioma: Inglês

Descrição

We report on design and fabrication of a folded-patch chip-size antenna for operation at 5.7 GHz and use in short-range wireless communications. Application of wafer-level chip-scale packaging (WLCSP) techniques like adhesive wafer bonding and through-wafer electrical via formation, combined with the selected antenna type allows on-chip integration and is the main novelty of our design work. This antenna, built on two stacked substrates, allows size reduction down to 4.5x4x1 mm3 and has projected efficiency of 66%.