Reusable IP cores library for EV propulsion systems

• Author(s): de Castro, R. ; Araújo, R.E. ; Freitas, D.
• Date: 2010
• Persistent ID: http://hdl.handle.net/10216/25613
• Origin: Repositório Aberto da Universidade do Porto
• Subject(s): Ciências tecnológicas; Engenharia; Engenharia de controlo, Ciências tecnológicas; Engenharia; Engenharia de projecto, Ciências tecnológicas; Engenharia; Engenharia electrotécnica, Ciências tecnológicas; Tecnologia; Tecnologia energética; Veículos eléctricos
• Document Type: Conference Object
• Language: English

Description

This paper presents a new control chip design, based on Field Programmable Gate Array (FPGA) technology, for multi-motor electric vehicles. The control chip builds around a reusable intellectual property (IP) core, named Propulsion Control System (PCS); which features motor control functions with field orientation methods, and energy loss minimization of induction motors. To reduce the cost, implementation issues related with the limited number of dedicated multipliers were overcome using an efficient computational block, based on resource sharing strategy. Due to the parallel processing offered by FPGAs, the resulting implementation can be effortlessly adapted to different electric vehicles topologies, like single or multi-motor drive. As proof of concept, two prototypes with single and multi-motor configurations were developed with the control chip design implemented in a low cost Xilinx Spartan 3 FPGA. Experimental verification of the energy loss minimization algorithm is provided, showing considerable energy savings (>15%) in low speed conditions and improving the electric vehicle range per charge.