This paper gives a short overview of waferlevel chip-scale packaging technology and analyses its added value in the packaging of RF ICs. Particularly, the possibilities of substrate crosstalk suppression by substrate thinning and trenching together with embedding of rf passives (inductors, antennas) are addressed. The Shellcasetype wafer-level packaging solution is used as a study case presenting its fabricatio...
Financiadores do RCAAP | |||||||
![]() |
![]() |
![]() |
![]() |
![]() |
![]() |