In the following a new data acquisition architecture is proposed allowing high sampling rates along with a large memory data buffer. The modular design allows up to four 250 MHz, 8-bit acquisition channels to operate in an interleaved way, achieving 1 GSPS. Each channel can acquire continuously up to 3 MBytes of data (or 12 MBytes when interleaved). Since several modules can coexist in an acquisition system, pr...
Financiadores do RCAAP | |||||||
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