Encontrados 4 documentos, a visualizar página 1 de 1
Flexible Use of IP Cores on Dynamically Reconfigurable Systems
Miguel L. Silva; João Canas Ferreira; José Silva MatosThe advantages of dynamic reconfiguration can only be exploited if devices, tools and design flows are available to support the partial reconfiguration of FPGA-based systems. For a number of applications, enabling the swap of cores at run-time, under software control, is an essential feature that allows tailoring the system response to the needs of different methods, standards and power/performance requirements...
A Processor for Testing Mixed-Signal Cores in System-on-Chip
Francisco Duarte; José Machado da Silva; José Carlos Alves; António Pinho; José Silva MatosThis paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor, which can be implemented within a system's reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester. Building these test operations on-chip allows for simplifying exte...
A High Level Test Processor and Test Program Generator
Francisco Duarte; José Carlos Alves; José Machado da Silva; António Pinho; José Silva MatosEmbedded test within integrated systems allows to overcome some of the difficulties found when testing using only an external tester. The reutilization of a reconfigurable FPGA-like block that may exist in certain SoC systems, enables the implementation of on-chip test processors highly optimized to meet the specific requirements of the test procedure for each block. The fast reconfiguration of SRAM-based FPGA ...
Design for Embedded Testing of an LNA
José Machado da Silva; António Pinho; José Silva MatosIn-circuit testing methodologies are required to tackle the evaluation of embedded radio-frequency circuits. This paper presents design considerations for the test circuitry proposed to implement a methodology for on-chip testing a low-noise amplifier. A previously reported test technique consists on applying to the LNA a sequence of stimuli with different amplitudes, and on measuring the output amplitude for ...
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