Encontrados 8 documentos, a visualizar página 1 de 1
Implementação e Simulação do Processador MIPS com a ALU reconfigurável dinamica...
Iouliia Skliarova; António B. FerrariThis article describes a set of simulation tools for processors implementing subsets of the MIPS architecture. The design environment that has been created allows the user to write simple assembly language programs and to visualize their execution in terms of the processor's internal structure, i.e. of the control signals generated with the flow of time, ALU operation results and c...
Projecto e Implementação de um subconjunto da arquitectura MIPS16 com base em F...
Iouliia Skliarova; António B FerrariThe paper considers the design of a proccessor with MIPS16 architecture on the base of FPGA XC4010XL and presents the developed software tools that allow to analyse the constructed digital circuits in FPGA, to implement the desired set of instructions for the processor, and to work with the processor in interactive mode. The design flow is based on tools and libraries of the c...
Introdução à computação reconfigurável
Iouliia Skliarova; António B. FerrariWith the advent of new types of programmable logic devices (PLDs), the process of digital system design has undergone a notable revision during the past few decades.Actually, many digital systems are implemented with the aidof high-capacity PLDs (FPGAs, in particular). The FPGA market continues to grow resulting in a wide variety of available devices. In this context the new concept of ...
Modelos matemáticos e problemas de optimização combinatória
Iouliia Skliarova; António B. FerrariThe paper presents the results of the analysis of different models that are used in problems of combinatorial optimization, such as graphs, sets, discrete matrices, and Boolean functions. It is shown that these models can be mutually converted one into another. Many examples of typical combinatorial tasks, which appear at different steps of the design of digital devices, are consid...
Utilização de hardware reconfigurável para acelerar a satisfação booleana
Iouliia Skliarova; António B. FerrariThe paper presents a case study of accelerating Boolean satisfiability in reconfigurable hardware. Boolean satisfiability (SAT) is an important problem having many applications in CAD and other areas. We propose an application-specific approach to accelerate the backtrack search algorithm for the SAT problem formulated over discrete matrix. The algorithm employed involves a quite&n...
Satisfação booleana: algoritmos, aplicações, implementações
Iouliia Skliarova; António B. FerrariThis paper presents the detailed description of the Boolean satisfiability (SAT) problem and considers the complete discrete algorithms that are commonly employed in its solution. It is demonstrated that SAT has numerous practical applications. Thus the design and implementation of efficient algorithms is of great importance today. Finally, various realizations of SAT solvers based...
Utilização do hardware reconfigurável para acelerar algoritmos evolutivos: o ca...
Iouliia Skliarova; António B. FerrariEvolutionary algorithms (EA) have been shown to be an effective approach for finding near-optimum solutions to problems of combinatorial optimization. The paper analyzes a possibility of acceleration of EA for the traveling salesman problem (TSP) with the aid of reconfigurable hardware. The estimative results show that the combination of general-purpose computer and FPGAresources a...
The ARPA Project - Creating an Open-Source Real-Time System-on-Chip
Arnaldo S. R. Oliveira; Valery A. Sklyarov; António B. FerrariThis paper describes the ARPA project.The aim of this project is to develop an opensource System-on-Chip model for real-time applications.The main component of the SoC is a MIPS based RISC processor. It is implemented using a pipelined Simultaneous Multithreading (SMT) structure, which allows exploring the Instruction and Task Level Parallelism, decrease tlie contextswitching time and a...
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