An FPGA implementation of OFDM transceiver for LTE applications

• Author(s): Pereira, Tiago ; Violas, Manuel ; Lourenço, João ; Gameiro, Atílio ; Silva, Adão ; Ribeiro, Carlos
• Date: 2013
• Persistent ID: http://hdl.handle.net/10773/12534
• Origin: RIA - Repositório Institucional da Universidade de Aveiro
• Subject(s): Software Defined Radio; OFDM; FPGA; Time-domain synchronization; Least square channel estimation
• Document Type: Article
• Language: English

Description

The paper presents a real-time transceiver using an Orthogonal Frequency-Division Multiplexing (OFDM) signaling scheme. The transceiver is implemented on a Field- Programmable Gate Array (FPGA) through Xilinx System Generator for DSP and includes all the blocks needed for the transmission path of OFDM. The transmitter frame can be reconfigured for different pilot and data schemes. In the receiver, time-domain synchronization is achieved thr ough a joint maximum likelihood (ML) symbol arrival-time and carrier frequency offset (CFO) estimator through the redundant information contained in the cyclic prefix (CP). A least-squares channel estimation retrieves the channel state information and a simple zero-forcing scheme has been implemented for channel equalization. Results show that a rough implementation of the signal path can be impleme nted by using only Xilinx System Generator for DSP.