A low-power low-voltage digital bus interface for MCM-based microsystems

• Autor(es): Correia, J. H. ; Cretu, E. ; Bartek, M. ; Wolffenbuttel, R. F.
• Data: 1997
• Identificador Persistente: http://hdl.handle.net/1822/4548
• Origem: RepositóriUM - Universidade do Minho
• Assunto(s): Microsystem; Multi-chip-module
• Tipo de Documento: Documento de conferência
• Idioma: Inglês

Descrição

Comunicação apresentada na 23rd European Solid-State Circuits Conference (ESSCIRC '97), Southampton, UK, 16-18 September 1997. This paper describes a digital local bus interface, which is designed for use in a multi-chip-composed microsystem. The chip area using a CMOS 1.6mm n-well technology is 1mm2. Power consumption at 5V@100kHz is less than 500mW and for 5V@4MHz less than 2mW due to a smart power management of all functional blocks. The bus interface is able to transmit a digital code, bitstream, analog voltage, frequency, duty-cycle and also provides calibration facilities, service request and interrupt request for the smart sensors or microactuators.