A scheduling framework for heterogenous multiprocessor architectures based on i...

• Author(s): Tavares, Adriano ; Couto, Carlos
• Date: 2001
• Persistent ID: http://hdl.handle.net/1822/2029
• Origin: RepositóriUM - Universidade do Minho
• Subject(s): Scheduling; Heterogeneous multiprocessor system; Embedded systems; Tabu search method; Optimization methods; Interprocessor communication modeling
• Document Type: Conference Object
• Language: English

Description

Current VLSI and networking technology, the increase in computational power, and the rapid decrease in computational cost, enable the interconnection of VLSI processors, which can be arranged on a functional decomposition of the computational task to exploit the potential of multiprocessing. The use of multiprocessor systems in such way, provides a novel and cost effective solution in solving many practical problems in signal processing, control systems, instrumentation systems and robotics. In this article we present a framework that addresses the specificities of industrial processors, such as DSPs and microcontrollers and can easily be used to implement a huge range of scheduling algorithms.